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3 Latest Announced Rounds

$1,325.73M Raised in 74 Funding Rounds in the past 7 Days - View All

Funding Round Profile

Rapid Silicon

start up
United States - Los Gatos, California
  • 13/01/2023
  • Series A
  • $15,000,000

Rapid Silicon is a leader in providing domain-specific FPGAs for diverse target applications and power, performance, and area (PPA). We utilize a combination of open-source methodology and proprietary AI technology to enable a fast and seamless design-to-silicon experience.


Related People

Naveed SherwaniFounder

Naveed Sherwani United States - San Francisco Bay Area

Dr. Sherwani has decades of experience in entrepreneurship, technical engineering and general management.

Dr. Sherwani currently serves as Chairman, President and CEO of RapidSilicon, a leading FPGA company. In addition to serving on multiple boards and advisor to several companies.

Prior to this role, he served as chairman, president and CEO of SiFive, a leader in RISC-V. He also serves as chairman of several companies, including StarFive and LeapFive. In addition, he served as chair, RISC-V strategic alliances at RISC-V international.

Dr. Sherwani started his first company, when he was only 18 years old. He has founded and co-founded multiple companies.

Prior to joining SiFive, he founded PeerNova, a company focused on technology solutions Based on blockchain technology. Dr. Sherwani served as Chairman, President and CEO of PeerNova.

Prior to PeerNova, Dr. Sherwani co-founded Open-Silicon, a leading provider of ASIC solutions. Under his leadership, Open-Silicon designed over 300 ASICs.

Prior to Open-Silicon, as the founder and General Manager of Intel Microelectronics Services, he pioneered Open methodology for ASICs. He also founded Brite Semi, a leading ASIC solution provider in China/APAC.

He has served on the boards of various companies, including Touchstone Semiconductor, and Integration associates (sold to Silicon Labs).

Dr. Sherwani worked at Intel for nearly a decade, where he co-architected the Intel microprocessor design methodology and design environment used in several microprocessors and received the prestigious Intel achievement Award in 1997.

Dr. Sherwani is a noted author having authored several books and over 100 articles on various aspects of VLSI Physical Design Automation and ASICs. Dr. Sherwani served as a Professor at Western Michigan University, where his research focused on ASICs, EDA, Combinatorics, graph algorithms and parallel computing.

He received his Ph.D from the University of Nebraska-Lincoln.